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01_12.1_Basics_7-13.mp4
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02_12.2_Logic-Level_Timing-_Basic_Assumptions__Models_30-59.mp4
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03_12.3_Logic-Level_Timing-_STA_Delay_Graph_ATs_RATs_and_Slacks_27-30.mp4
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04_12.4_Logic-Level_Timing-_A_Detailed_Example_and_the_Role_of_Slack_10-02.mp4
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05_12.5_Logic-Level_Timing-_Computing_ATs_RATs_Slacks_and_Worst_Paths_26-55.mp4
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06_12.6_Interconnect_Timing-_Electrical_Models_of_Wire_Delay_16-05.mp4
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07_12.7_Interconnect_Timing-_The_Elmore_Delay_Model_14-19.mp4
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08_12.8_Interconnect_Timing-_Elmore_Delay_Examples_14-56.mp4
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